Logic gate simplification

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Hi I was building different logic gates using only the NOR gate
However, I was very confused with the answers people got for example.



Anyway the image shows an implementation of NAND gate using NOR Gates



The top part of the image shows how everyone else gets NAND from using NOR



The bottom part of the image is what I think It can be simplified to. Please tell me if what I have done is correct thanks.



This is what I got










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  • Better right it down as a formula.
    – Wuestenfux
    Sep 2 at 8:18














up vote
0
down vote

favorite












Hi I was building different logic gates using only the NOR gate
However, I was very confused with the answers people got for example.



Anyway the image shows an implementation of NAND gate using NOR Gates



The top part of the image shows how everyone else gets NAND from using NOR



The bottom part of the image is what I think It can be simplified to. Please tell me if what I have done is correct thanks.



This is what I got










share|cite|improve this question























  • Better right it down as a formula.
    – Wuestenfux
    Sep 2 at 8:18












up vote
0
down vote

favorite









up vote
0
down vote

favorite











Hi I was building different logic gates using only the NOR gate
However, I was very confused with the answers people got for example.



Anyway the image shows an implementation of NAND gate using NOR Gates



The top part of the image shows how everyone else gets NAND from using NOR



The bottom part of the image is what I think It can be simplified to. Please tell me if what I have done is correct thanks.



This is what I got










share|cite|improve this question















Hi I was building different logic gates using only the NOR gate
However, I was very confused with the answers people got for example.



Anyway the image shows an implementation of NAND gate using NOR Gates



The top part of the image shows how everyone else gets NAND from using NOR



The bottom part of the image is what I think It can be simplified to. Please tell me if what I have done is correct thanks.



This is what I got







discrete-mathematics logic






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edited Sep 2 at 9:22









Henning Makholm

231k16297529




231k16297529










asked Sep 2 at 7:44









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  • Better right it down as a formula.
    – Wuestenfux
    Sep 2 at 8:18
















  • Better right it down as a formula.
    – Wuestenfux
    Sep 2 at 8:18















Better right it down as a formula.
– Wuestenfux
Sep 2 at 8:18




Better right it down as a formula.
– Wuestenfux
Sep 2 at 8:18










1 Answer
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Your alternative circuit computes NOT(NOT(A NOR B)), which the same as NOR rather than NAND.



Your computation has an error in very the first step where you represent A NOR B as $overline A+overline B$ -- it should be $overlineA+B$.






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    1 Answer
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    1 Answer
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    active

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    up vote
    1
    down vote













    Your alternative circuit computes NOT(NOT(A NOR B)), which the same as NOR rather than NAND.



    Your computation has an error in very the first step where you represent A NOR B as $overline A+overline B$ -- it should be $overlineA+B$.






    share|cite|improve this answer


























      up vote
      1
      down vote













      Your alternative circuit computes NOT(NOT(A NOR B)), which the same as NOR rather than NAND.



      Your computation has an error in very the first step where you represent A NOR B as $overline A+overline B$ -- it should be $overlineA+B$.






      share|cite|improve this answer
























        up vote
        1
        down vote










        up vote
        1
        down vote









        Your alternative circuit computes NOT(NOT(A NOR B)), which the same as NOR rather than NAND.



        Your computation has an error in very the first step where you represent A NOR B as $overline A+overline B$ -- it should be $overlineA+B$.






        share|cite|improve this answer














        Your alternative circuit computes NOT(NOT(A NOR B)), which the same as NOR rather than NAND.



        Your computation has an error in very the first step where you represent A NOR B as $overline A+overline B$ -- it should be $overlineA+B$.







        share|cite|improve this answer














        share|cite|improve this answer



        share|cite|improve this answer








        edited Sep 2 at 9:24

























        answered Sep 2 at 9:19









        Henning Makholm

        231k16297529




        231k16297529



























             

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